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Nexperia PUMB13 115 double transistor with built in bias resistors simplifies design and lowers costs

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Nexperia PUMB13 115 double transistor with built in bias resistors simplifies design and lowers costs

Output Voltage(VO(on)) : -

Input Resistor : 4.7kΩ

Resistor Ratio : 10

Collector - Emitter Voltage VCEO : 50V

Description : Pre-Biased Bipolar Transistor (BJT) 2 PNP Pre-Biased Transistors 50V 100mA 300mW Surface Mount TSSOP-6(SOT-363)

Mfr. Part # : PUMB13,115

Model Number : PUMB13,115

Package : TSSOP-6(SOT-363)

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Product Overview

The Nexperia PUMB13 is a PNP/PNP resistor-equipped double transistor (RET) designed for low-current peripheral driving and control of IC inputs. This device simplifies circuit design, reduces component count, and lowers pick-and-place costs due to its built-in bias resistors. It is an ideal replacement for general-purpose transistors in digital applications.

Product Attributes

  • Brand: Nexperia
  • Product Type: PNP/PNP resistor-equipped double transistor (RET)
  • Package Type: SOT363 (SC-88)
  • Complementary NPN/PNP: PUMD13
  • Complementary NPN/NPN: PUMH13

Technical Specifications

Symbol Parameter Conditions Min Typ Max Unit
Per transistor
VCEO Collector-emitter voltage Open base - - -50 V
IO Output current - - - -100 mA
R1 Bias resistor 1 (input) [1] 3.3 4.7 6.1 k
R2/R1 Bias resistor ratio [1] 8 10 12 -
VCBO Collector-base voltage Open emitter - - -50 V
VEBO Emitter-base voltage Open collector - - -5 V
VI Input voltage Positive - - 5 V
VI Input voltage Negative - - -30 V
Ptot Total power dissipation Tamb 25 C [1] - - 200 mW
Per device
Ptot Total power dissipation Tamb = 25 C [1] - - 300 mW
Tj Junction temperature - - - 150 C
Tamb Ambient temperature - -65 - 150 C
Tstg Storage temperature - -65 - 150 C
Thermal characteristics
Rth(j-a) Thermal resistance from junction to ambient In free air [1] - - 625 K/W
Rth(j-a) Thermal resistance from junction to ambient Per device, in free air [1] - - 417 K/W
Characteristics
V(BR)CBO Collector-base breakdown voltage IC = -100 A; IE = 0 A -50 - - V
V(BR)CEO Collector-emitter breakdown voltage IC = -2 mA; IB = 0 A -50 - - V
ICBO Collector-base cut-off current VCB = -50 V; IE = 0 A - - -100 nA
ICEO Collector-emitter cut-off current VCE = -30 V; IB = 0 A - - -1 A
ICEO Collector-emitter cut-off current VCE = -30 V; IB = 0 A; Tj = 150 C - - -5 A
IEBO Emitter-base cut-off current VEB = -5 V; IC = 0 A - - -170 A
hFE DC current gain VCE = -5 V; IC = -10 mA 100 - - -
VCEsat Collector-emitter saturation voltage IC = -5 mA; IB = -0.25 mA - - -100 mV
VI(off) Off-state input voltage VCE = -5 V; IC = -100 A - -0.6 -0.5 V
VI(on) On-state input voltage VCE = -0.3 V; IC = -5 mA -1.3 -0.9 - V
R1 Bias resistor 1 (input) [1] 3.3 4.7 6.1 k
R2/R1 Bias resistor ratio [1] 8 10 12 -
Cc Collector capacitance VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz - - 3 pF
fT Transition frequency VCE = -5 V; IC = -10 mA; f = 100 MHz [2] - 180 - MHz

[1] See "Section 11: Test information" for resistor calculation and test conditions.

[2] Characteristics of built-in transistor


2410121948_Nexperia-PUMB13-115_C553489.pdf


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